Why Attend
The AI Hardware Summit is the premier event focused on accelerating AI workloads in the cloud and at the edge. From the design of components and systems, through to the execution of the workload, AI acceleration is an end-to-end challenge. Our community’s goal is to reduce time-to-value in the ML lifecycle, and to unlock new possibilities for AI development.
We are creating a feedback loop between those designing AI systems and those deploying them, to accelerate the development and adoption of AI technologies across industries.
The AI Hardware Summit is first and foremost for technologists – inventors, architects and engineers - as well as researchers working on the latest AI models, and leaders from industries who are implementing machine learning at scale in their organizations.
2021 Advisory Board
Author:
Andrew Feldman
Andrew is a co-founder and CEO of Cerebras Systems, a venture-backed stealth-mode startup located in Los Altos, California. He leads a team of phenomenal people with a track record of building products that profoundly changed the largest markets in tech.
Prior to co-founding Cerebras Systems, he was co-founder and CEO of SeaMicro. SeaMicro (acquired by AMD for $355 million) was the pioneer in low power server technology. SeaMicro changed the trajectory of the server industry by inventing the high density, lower power, microserver category.
Prior to co-founding SeaMicro, he was Vice President of Marketing and Product Management at Force10 (acquired by Dell for $800 Million) Networks, and Vice President of Corporate Marketing and Corporate Development for Riverstone Networks (NASDAQ: RSTN) from inception through IPO.
Andrew holds a B.A. and MBA from Stanford University.
Author:
Lip-Bu Tan
Mr. Lip-Bu Tan is a Co-Founder, Partner, Managing Director, and Chairman of Walden International. Mr. Tan serves as the Chairman on the Board of SambaNova Systems, Inc., and has been the Chief Executive Officer at Cadence Design Systems Inc. since January 2009, serving as its President from January 2009 to November 2017. Lip-Bu focuses on semiconductor/components, cloud/big data, artificial intelligence and machine learning. Lip-Bu holds a B.S. in Physics from Nanyang University in Singapore, a M.S. in Nuclear Engineering from Massachusetts Institute of Technology, and a M.B.A. from the University of San Francisco.
Author:
Karl Freund
Karl Freund is Moor Insights & Strategy’s consulting lead for HPC and Deep Learning. His recent experiences as the VP of Marketing at AMD and Calxeda, as well as his previous positions at Cray and IBM, positions him as a leading industry expert in these rapidly evolving industries. Karl works with investment and technology customers to help them understand the emerging Deep Learning opportunity in data centers, from competitive landscape to ecosystem to strategy.
Karl has worked directly with datacenter end users, OEMs, ODMs and the industry ecosystem, enabling him to help his clients define the appropriate business, product, and go-to-market strategies. He is also recognized expert on the subject of low-power servers and the emergence of ARM in the datacenter and has been a featured speaker at scores of investment and industry conferences on this topic.
Accomplishments during his career include:
- Led the revived HPC initiative at AMD, targeting APUs at deep learning and other HPC workloads
- Created an industry-wide thought leadership position for Calxeda in the ARM Server market
- Helped forge the early relationship between HP and Calxeda leading to the surprise announcement of HP Moonshot with Calxeda in 2011
- Built the IBM Power Server brand from 14% market share to over 50% share
- Integrated the Tivoli brand into the IBM company’s branding and marketing organization
- Co-Led the integration of HP and Apollo Marketing after the Boston-based desktop company’s acquisition
Karl’s background includes RISC and Mainframe servers, as well as HPC (Supercomputing). He has extensive experience as a global marketing executive at IBM where he was VP Marketing (2000-2010), Cray where he was VP Marketing (1995-1998), and HP where he was a Division Marketing Manager (1979-1995).
Author:
Kunle Olukotun
Kunle Olukotun is Cadence Design Professor of Electrical Engineering and Computer Science at Stanford University. He founded Afara Websystems, acquired by Sun in 2002. He is a Pioneer of Chip Multiprocessor Designs, Director of the Stanford Pervasive Parallelism Lab, and Co-leader of the Data Analytics for What’s Next (DAWN) research program.
In 2017 Olukotun and Chris Ré founded SambaNova Systems. SambaNova Systems has developed a disruptive next-generation computing platform to power machine learning and data analytics.
Author:
Victoria Rege
Victoria has over a decade of experience in the semiconductor space. She currently heads up Strategic Partnerships at Graphcore, working with key customers and leading Research & Universities AI engagements. Previously she held several leadership positions at NVIDIA from global alliances, product marketing and campaigns to the founding of the GPU Technology Conference. Prior to joining NVIDIA, Victoria worked in the hedge fund space, as Executive Director for the Hedge Fund Business Operations Association. Victoria is a frequent contributor to ACM SIGGRAPH and is Immersive Chair for the SIGGRAPH 2019 Conference. She's also an active member of the Consumer Technology Association's AI Working Group.
Author:
Cheng Wang
CHENG WANG. Senior VP Engineering: Architecture, Software, Silicon. Originally from Shanghai, PRC. BSEECS, UC Berkeley. Cheng has led the architecture, silicon implementation and software development for eFPGA over two generations from 180nm-16nm and now neural inferencing. Two years as VLSI designer at Zoran. MSEE, EE PhD UCLA: designed 5 FPGA chips from 90nm to 40nm. 2013 Distinguished PhD Dissertation Award. 2014 ISSCC Lewis Winner Award for Outstanding Paper. Multiple patents at UCLA and Flex Logix.
Flex Logix’s NMAX platform excels at getting high hardware utilization at batch=1, which is critical for edge applications. Most of the new information is in the 2nd half of the slide deck.
NMAX delivers from 1 to 100+TOPS, as you need, at 10x lower cost and 3-5x lower power than existing solutions because we get 50-80% MAC utilization on tough models, meaning we need less silicon area, and we achieve it with 10x less DRAM bandwidth, meaning less DRAM cost and system power.
Author:
Jimmy Pike
Jimmy D. Pike is a Senior Vice President and Senior Fellow at Dell EMC and serves as a senior system architect and technologist in the office of Dell’s Server and Infrastructure System’s CTO. In addition to his duties as an “at large” technologist, he focuses on high-performance computing, machine learning, and edge computing.
A longtime industry figure with more than 50 patents, Jimmy has served in various executive and technology roles:
• An analyst at the analyst firm of Moor Insights & Strategy
• Chief Architect of Dell’s Enterprise Solutions group and HPC lead technologist
• Chief Architect and Technologist for Dell’s Data Center group.
Jimmy has as also served in various other leadership roles at Intel, AT&T, NCR, and Harris Corporation.
Author:
Sailesh Kottapalli
Sailesh Kottapalli is an Intel Senior Fellow and the chief architect of data center processor architecture in the Silicon Engineering Group. He leads a team of architects responsible for developing the architecture of Intel® Xeon® and Intel® Atom™ server product lines as well as the overall compute solutions strategy for datacenter segment. He also leads a cross-organizations effort in driving the technology leadership on the Interconnect pillar. Kottapalli joined Intel in 1996 as a design engineer working on the first Intel® Itanium® processor, then code-named “Merced.” Subsequently, he served as lead engineer for several Intel Itanium and Intel Xeon processor evaluations, and more recently, as lead architect for a series of Intel Xeon server processors. His work in this area earned Kottapalli an Intel Achievement Award for delivering record generational performance improvements in a high-end server product. An active participant in industry and internal conferences, Kottapalli has authored or co-authored several published technical papers, delivered talks and taken part in roundtables and panel discussions. He has also been granted approximately three dozen patents in processor architecture, with additional patents pending. Kottapalli holds a bachelor’s degree in computer science from Andhra University in India and a master’s degree in computer engineering from Virginia Tech.
2021 Speakers
Aart de Geus
Since co-founding Synopsys in 1986, Aart has expanded Synopsys from a start-up synthesis company to a global high-tech leader. He has long been considered one of the world's leading experts on logic synthesis and simulation, and frequently keynotes major conferences in electronics and design automation. Dr. de Geus has been widely recognized for his technical, business, and community achievements with multiple awards including Electronic Business Magazine's "CEO of the Year," the IEEE Robert N. Noyce Medal, the GSA Morris Chang Exemplary Leadership Award, the Silicon Valley Engineering Council Hall of Fame Award, and the SVLG Lifetime Achievement Award. He serves on the Boards of the Silicon Valley Leadership Group, Applied Materials, the Global Semiconductor Alliance, and the Electronic System Design Alliance.
Cheng Wang
CHENG WANG. Senior VP Engineering: Architecture, Software, Silicon. Originally from Shanghai, PRC. BSEECS, UC Berkeley. Cheng has led the architecture, silicon implementation and software development for eFPGA over two generations from 180nm-16nm and now neural inferencing. Two years as VLSI designer at Zoran. MSEE, EE PhD UCLA: designed 5 FPGA chips from 90nm to 40nm. 2013 Distinguished PhD Dissertation Award. 2014 ISSCC Lewis Winner Award for Outstanding Paper. Multiple patents at UCLA and Flex Logix.
Flex Logix’s NMAX platform excels at getting high hardware utilization at batch=1, which is critical for edge applications. Most of the new information is in the 2nd half of the slide deck.
NMAX delivers from 1 to 100+TOPS, as you need, at 10x lower cost and 3-5x lower power than existing solutions because we get 50-80% MAC utilization on tough models, meaning we need less silicon area, and we achieve it with 10x less DRAM bandwidth, meaning less DRAM cost and system power.
Greg Diamos
Greg leads transformation engineering at Landing AI, focusing on building new AI engineering organizations. He is a founding member of MLPerf. Previously he lead AI research at Baidu’s Silicon Valley AI Lab (SVAIL), where he helped develop the Deep Speech and Deep Voice systems. Before Baidu, Greg contributed to the design of compiler and microarchitecture technologies used in the Volta GPU at NVIDIA, including the invention of the SIMT independent thread scheduling system. Greg holds a PhD from the Georgia Institute of Technology, where he led the development of the GPU-Ocelot dynamic compiler, which targeted CPUs and GPUs from the same program representation.
Karl Freund
Karl Freund is Moor Insights & Strategy’s consulting lead for HPC and Deep Learning. His recent experiences as the VP of Marketing at AMD and Calxeda, as well as his previous positions at Cray and IBM, positions him as a leading industry expert in these rapidly evolving industries. Karl works with investment and technology customers to help them understand the emerging Deep Learning opportunity in data centers, from competitive landscape to ecosystem to strategy.
Karl has worked directly with datacenter end users, OEMs, ODMs and the industry ecosystem, enabling him to help his clients define the appropriate business, product, and go-to-market strategies. He is also recognized expert on the subject of low-power servers and the emergence of ARM in the datacenter and has been a featured speaker at scores of investment and industry conferences on this topic.
Accomplishments during his career include:
- Led the revived HPC initiative at AMD, targeting APUs at deep learning and other HPC workloads
- Created an industry-wide thought leadership position for Calxeda in the ARM Server market
- Helped forge the early relationship between HP and Calxeda leading to the surprise announcement of HP Moonshot with Calxeda in 2011
- Built the IBM Power Server brand from 14% market share to over 50% share
- Integrated the Tivoli brand into the IBM company’s branding and marketing organization
- Co-Led the integration of HP and Apollo Marketing after the Boston-based desktop company’s acquisition
Karl’s background includes RISC and Mainframe servers, as well as HPC (Supercomputing). He has extensive experience as a global marketing executive at IBM where he was VP Marketing (2000-2010), Cray where he was VP Marketing (1995-1998), and HP where he was a Division Marketing Manager (1979-1995).
Carole Jean Wu
Carole-Jean Wu is a Research Scientist at Facebook AI Research. Her research focuses on designing systems for at-scale execution of machine learning, such as personalized recommender systems and for mobile deployment. More generally, her research interests are in computer architecture with particular focus on energy- and memory-efficient systems. Carole-Jean chairs MLPerf Recommendation Benchmark Advisory Board and co-chairs MLPerf Inference. She received her M.A. and Ph.D. from Princeton and B.Sc. from Cornell. She holds tenure from ASU and is the recipient of the NSF CAREER Award, Facebook AI Infrastructure Mentorship Award, the IEEE Young Engineer of the Year Award, the Science Foundation Arizona Bisgrove Early Career Scholarship, and the Intel PhD Fellowship, among a number of Best Paper awards.
Lip-Bu Tan
Mr. Lip-Bu Tan is a Co-Founder, Partner, Managing Director, and Chairman of Walden International. Mr. Tan serves as the Chairman on the Board of SambaNova Systems, Inc., and has been the Chief Executive Officer at Cadence Design Systems Inc. since January 2009, serving as its President from January 2009 to November 2017. Lip-Bu focuses on semiconductor/components, cloud/big data, artificial intelligence and machine learning. Lip-Bu holds a B.S. in Physics from Nanyang University in Singapore, a M.S. in Nuclear Engineering from Massachusetts Institute of Technology, and a M.B.A. from the University of San Francisco.
Mikhail Smelyanskiy
Misha Smelyanskiy is a Director of AI System Co-Design Group at Facebook. The group delivers innovative, high-performance optimizations of key AI services on existing platforms, as well as co-designs future AI systems at datacenter scale. Before joining Facebook in early 2017, Misha spent 13 years at Intel. First at Intel Parallel Computing Labs, leading application-driven parallel architecture research, which resulted in significant contribution to the definition of Intel first Many-Integrated Core architecture. And later as the director of Exascale SW/HW co-design group, working with external HPC and Machine Learning customers to derive system-level hardware. Misha has published 50+ papers in top-tier architecture, supercomputing and ML conferences and journals. Misha won Green500 competition in 2012, developed world fastest distributed quantum system simulator in 2016, and was 2014 Gordon Bell Award Finalist.
Mark Maybury
MARK MAYBURY is Stanley Black & Decker’s first Chief Technology Officer. In this position, Mark manages a team across the company's businesses and functions and advises on technological threats and opportunities, as well as provides access to all elements of the global technology ecosystem.
Prior to joining Stanley Black & Decker, Mark spent 27 years at The MITRE Corporation, where he held a variety of strategic technology roles. Most recently he served as Vice President of Intelligence Portfolios and prior to that was MITRE's Vice President and Chief Security Officer and Director of the National Cybersecurity Federally Funded Research and Development Center (FFRDC). Before joining MITRE, Mark served as a U.S. Air Force officer. He later returned to the Air Force as Chief Scientist from 2010 to 2013 where he advised the Chief of Staff and Secretary of the Air Force on a wide range of scientific and technical issues.
He is currently a board member on the Defense Science Board, Mark Twain House and Museum Board and the Connecticut Science Center Board and previously served on multiple years of service on the Air Force Scientific Advisory Board and the Homeland Security Science and Technology Advisory committee. He is a fellow in both the IEEE and the Association for the Advancement of Artificial Intelligence.
Mark earned a bachelor's degree in mathematics from College of the Holy Cross (Fenwick Scholar, valedictorian), a master's degree in computer speech and language processing from Cambridge University, England (Rotary Scholar), a Master of Business Administration from Rensselaer Polytechnic Institute, and a doctoral degree in artificial intelligence also from Cambridge University.
Mike Henry
Paolo Faraboschi
Paolo Faraboschi leads research in the Systems Research Lab at HP Labs. His technical interests lie at the intersection of hardware and software and include low power servers and systems-on-a-chip, workload-optimized, highly-parallel and distributed systems, ILP and VLIW processor architectures, compilers, and embedded systems. Faraboschi’s current research focuses on next-generation data-centric systems. His work on system-level integration for low energy servers and scale-out architectures is a key element of the HP Moonshot System, HP’s new class of software-defined servers built to address the energy efficiency challenges of hyperscale datacenters.
Previously, Faraboschi led HP Labs research in system-level modeling and simulation, an effort that resulted in the COTSon open-source simulation platform. He is also the founder of HP’s Barcelona Research Office, which pioneered research in contentprocessing systems.. Before that, Faraboschi was technical lead for the Custom-Fit Processors Project at HP Labs, Cambridge (MA), building highly-optimized, softwaredefined CPU cores. In that role, he was the principal architect of the instruction set architecture for the Lx/ST200 family of VLIW embedded processor cores (developed with STMicroelectronics) which have been used for over a decade in a variety of audio, video, and imaging consumer products, including HP's printers and scanners.
A regular keynote speaker at conferences and industry events, Faraboschi is an IEEE Fellow for "contributions to embedded processor architecture & system-on-chip technology." An active member of the computer architecture community, he also serves regularly on IEEE program and organizational committees, was guest editor of the 2012 edition of IEEE Micro TopPicks, and is co-author (with Josh Fisher and Cliff Young) of the book, “Embedded Computing: a VLIW Approach to Architecture, Compilers and Tools.” A co-holder of 24 granted patents, several other patent applications, and co-author of over 65 scientific publications, Faraboschi received his M.S. and Ph.D. (Dottora)
Rashmi Gopinath
Kunle Olukotun
Kunle Olukotun is Cadence Design Professor of Electrical Engineering and Computer Science at Stanford University. He founded Afara Websystems, acquired by Sun in 2002. He is a Pioneer of Chip Multiprocessor Designs, Director of the Stanford Pervasive Parallelism Lab, and Co-leader of the Data Analytics for What’s Next (DAWN) research program.
In 2017 Olukotun and Chris Ré founded SambaNova Systems. SambaNova Systems has developed a disruptive next-generation computing platform to power machine learning and data analytics.
Dheevatsa Mudigere
Brett Simpson
Brett Simpson is a co-founder of Arete (formed in 2000) and is based in the firm's London office. He focuses on the global semiconductor component sector. Brett is a regular public speaker at industry events and after 17 years looking at the sector, has a wealth of experience to draw on. Prior to Arete, Brett spent two years at Goldman Sachs in an equity analyst role, specialising in European technology following three years with Ericsson UK, working in business development, covering all aspects of wireline and wireless telecom infrastructure.
Paul Lewis
Paul is Global CTO at Hitachi Vantara responsible for the leading technology evangelism, client executive advocacy, and external delivery of the Hitachi vision and strategy especially related to Digital Transformation and Social Innovation. For the past 25+ years, Paul has focused on technology R&D and innovation, IT/business strategic plans and governance, security and risk management, software and infrastructure architecture as the CTO and Senior Executive Technologist of several financial services organizations from start-ups to large business services providers.
2021 Agenda at a glance
AUDIENCE BREAKDOWN
Past attendees include:
2021 Partners
Headline Partner
Synopsys
Website: http://www.synopsys.com
Smart, Secure Everything—From Silicon to Software
Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.
Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.
Platinum Partner
SambaNova
Website: https://www.sambanovasystems.com/
We are a computing startup focused on building the industry’s most advanced systems platform to run AI applications from the datacenter to the edge.
Gold Partners
Flex Logix
Website: http://www.flex-logix.com
Flex Logix’ NMAX inferencing accelerators provide very high throughput and hardware utilization even at batch size = 1, with low system cost and system power.
NMAX MAC utilization is over 50% even at batch size = 1. For most inferencing engines utilization drops dramatically from batch 10 to batch 1 because they stall loading weights. High MAC utilization means less silicon area needed for the same throughput.
NMAX uses proprietary Flex Logix interconnect technology to utilize local, distributed SRAM very efficiently generating very high local bandwidth and dropping DRAM bandwidth requires to that of 1 or 2 LPDDR4 DRAMs, even for YOLOv3 at 30 frames/second. This lowers power and lowers cost.
NMAX will be available in TSMC16FFC/12FFC in mid 2019.
Imagination Technologies
Website: https://www.imgtec.com/
At Imagination, we create and license a range of multimedia and communications processors needed to create SoCs (Systems on Chips) that power mobile, consumer, automotive, enterprise, infrastructure, IoT and embedded electronics. We have over 25 years of experience in designing and licensing market-leading processor solutions for graphics, vision & AI processing, and multi-standard communications. We are chosen as a partner by many leading innovators in electronics. We achieved that position because we are passionate about innovation and have the drive to deliver technologies that solve key problems in new, more efficient ways. Our technologies offer strong differentiation compared to competing solutions and we pride ourselves in empowering you to deliver innovation that truly inspires new products. We’re motivated to work in close partnership with our customers and to develop meaningful relationships to provide the expertise you need to address your chosen markets, with success each and every time. We only succeed if you, our customers and partners succeed.
Event Partners
Achronix
Website: https://www.achronix.com/
Achronix is a leading manufacturer of FPGA and eFPGA IP data acceleration solutions specifically tuned for high-performance AI and ML applications. FPGAs are paving the way for the next era in AI applications and the ubiquitous building blocks for AI deployments from the cloud, to the edge to IoT. Our revolutionary new 7nm Speedster®7t FPGAs and Speedcore™ eFPGA IP are optimized for high-bandwidth workloads and eliminate the performance bottlenecks associated with traditional FPGAs.
Delivering ASIC-like performance, Speedster7t FPGAs are highly configurable, highly flexible compute engines. Built with high-performance 112Gbps transceivers, high-bandwidth GDDR6 interfaces, and high-speed PCIe Gen5 ports, Speedster7t FPGAs provide the high speed data and memory interfaces necessary for AI/ML applications. The Speedster7t FPGAs also feature a new machine learning processor (MLP) which supports new AI/ML number formats such as block floating port and provides >80 TOPs performance.
Achronix’ Speedcore eFPGA IP brings the power and flexibility of programmable logic to ASICs and SoCs. Speedcore IP can be seamlessly integrated into a custom design and is the only eFPGA technology shipping in high-volume production today. With Speedcore IP, customers define both resource counts and mix for logic, embedded memory blocks, MLP, and DSP blocks at up to 90% cost savings vs. traditional standalone FPGA solutions.
Visit achronix.com to learn more about our FPGA technology optimized for AI/ML applications.
Mythic
Website: http://www.mythic-ai.com
BRINGING NEXT-LEVEL AI TO EVERY DEVICE CONSTANT EVOLUTION
Mythic envisions a world where every device is intelligent, with human-like senses and high-level understanding of the environment around it. To realize this we built a team of top talent who bring decades of industry experience from across the entire computing spectrum – empowering everyone to challenge assumptions and eliminate the barriers to achieving our mission. They’ve gone beyond conventional digital architectures, memory, and calculation elements – rethinking everything from the ground up: from transistors and physics, through circuits and systems, up to software and AI algorithms. The result: Powerful life-enhancing AI that customers can push into anything – from fitness bands and hearing aids to self-driving cars and robotic drones.
proteanTecs
Website: https://www.proteantecs.com/
proteanTecs was founded with a mission to enable the electronics industry to continue to scale. As veterans of the industry, the founders witnessed firsthand the rising challenge of achieving quality and reliability without affecting cost and performance, especially as technologies advanced.
Existing value chain strategies and in-field operating models were long due for a digital revolution.
Since then, the company has introduced a breakthrough approach to overcome the many challenges that come with scale. Redefining industry metrics and benchmarks, we're raising the bar to meet future demands. proteanTecs is now trusted by key customers across various industries and is set to lead the revolution.
Founded in 2017, the company is headquartered in Israel with offices in New Jersey and California.
Samtec
Website: http://www.samtec.com
Founded in 1976, Samtec is a privately held, $822 MM global manufacturer of a broad line of electronic interconnect solutions, including High-Speed Board-to-Board, High-Speed Cables, Mid-Board and Panel Optics, Precision RF, Flexible Stacking, and Micro/Rugged components and cables. With 40+ location severing approximately 125 countries, Samtec’s global presence enables its unmatched customer service.
Media Partners
IoT Global Network
Website: http://www.iotglobalnetwork.com
IoT Global Network
Discover the world of IoT.
IoT Global Network is the ultimate intelligence platform for the global machine-to-machine communication value chain.
IoT Global Network serves as an invaluable source of information for IoT decision makers in all areas of industry and public services, including consumer-related, energy, financial, industrial, healthcare, security and transportation, – and anyone else who would like to learn more about how the Internet of Things will shape tomorrow’s society.
Discover. Learn. Connect. Engage.
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2021 Agenda
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Highlights
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VENUE
The 2021 AI Hardware Summit will be returning the Computer History Museum. Aligned to social distancing rules and regulations, there will be a reduced capacity and we highly expect in person tickets to sell out way in advance of the summit. Book early to avoid disappointment.
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